M.Tech in Electronics and Communication Engineering [Duration : 2 years / 4 Semester]
The department of Electronics Engineering offers a Master of Technology (M.Tech) Program in Electronics and Communication Engineering with four specializations:
1. Signal Processing & Communication (SPC)
2. Radar & Communication (R&C)
3. Defence Electronics Systems (DES)
4. VLSI & Embedded Systems (VLSI & ES).
The Program has a sanctioned strength of 75 students each year comprising of GATE qualified candidates and Self sponsored/ Indusrty Sponsored/ MoD sponsored candidates in the in the above areas of specializations.
Eligibility Criteria for Admission
The department of Electronics Engineering offers a Master of Technology (M.Tech) Program in Electronics and Communication Engineering with four specializations:
Sl. No. | M.Tech specialization and specialization Code | GATE Paper Codes | Eligibility Criteria |
1 | Signal Processing & Communication (SPC) | CS / EC / EE / IN | Master/Integrated degree or equivalent in Physics, Applied Physics, Electronic Science or related areas. (OR) B.E. / B.Tech / BSc. (Eng.) or equivalent in Electronics & Communication/ Electronics / Electrical / Communication / Telecommunication / Electronics & Instrumentation / E & TC Engineering / Computer Science & Engineering / Information Technology / Instrumentation Engineering or related areas. |
2 | Radar & Communication (R&C) | EC / EE / IN | |
3 | Defence Electronics Systems (DES) | EC / EE / IN | |
4 | VLSI & Embedded Systems (VLSI & ES) | CS / EC / EE / IN |
- Full time students with valid GATE score in Electrical Engineering or Electronics and Communication
- Full time students sponsored by govt. organizations/ industry/ self-sponsored.
Curriculum Structure
M. Tech. in Electronics and Communication Engineering
(Signal Processing and Communication)
Semester I
Sl. No | Course Code | Course Title | Contact Hours/ | *Credits | |
L | T/P | ||||
1. | EE601 | Microwave Engineering | 3 | 1 | 4 |
2. | EE602 | Digital Signal Processing | 3 | 1 | 4 |
3. | EE603 | Wireless and Mobile Communication | 3 | 1 | 4 |
4. | EE604 | Radar System Design | 3 | 1 | 4 |
5. | EE624 | Digital System Design using FPGA | 3 | 1 | 4 |
6. | AM607 | Mathematics for Engineers | 3 | 1 | 4 |
7 | PGC-601 | Research Methodology and IPR | 2 | 0 | 2 |
|
| Total | 20 | 6 | 26 |
Semester II
Sl. No | Course Code | Course Title | Contact Hours/ | *Credits | |
L | T/P | ||||
1 | EE606 | Statistical Signal Processing | 3 | 1 | 4 |
2 | EE607 | Detection and Estimation Theory | 3 | 1 | 4 |
3 |
| Departmental Elective I | 3 | 1 | 4 |
4 |
| Departmental Elective II | 3 | 1 | 4 |
5 |
| Elective – III | 3 | 1 | 4 |
6 |
| Elective – IV | 3 | 1 | 4 |
7 | PGC-602 | Audit 1 and 2 | 2 | 0 | 0 |
|
| Total | 20 | 6 | 24 |
* Four week industrial practice school during summer vacation for scholarship students (optional).
Semester III
Sl. No | Course Code | Course Title | Contact Hours | *Credits | |
L | T/P | ||||
1 | EE651 | M.Tech. Dissertation Phase I | 28** | 14 | |
|
| Total | 28 | 14 | |
Semester IV
Sl. No | Course Code | Course Title | Contact Hours | *Credits | |
L | T/P | ||||
1 | EE652 | M.Tech. Dissertation Phase II | 28** | 14 | |
|
| Total | 28 | 14 | |
*1 Credit in Theory/Tutorial means 1 contact hour and 1 credit practice/Project Thesis means 2 contact hours in a week.
M. Tech. in Electronics and Communication Engineering
(Radar and Communication)
Semester I
Sl. No | Course Code | Course Title | Contact Hours/ |
Credits | |
L | T/P |
| |||
1. | EE601 | Microwave Engineering | 3 | 1 | 4 |
2. | EE602 | Digital Signal Processing | 3 | 1 | 4 |
3. | EE603 | Wireless and Mobile Communication | 3 | 1 | 4 |
4. | EE604 | Radar System Design | 3 | 1 | 4 |
5. | EE624 | Digital System Design using FPGA | 3 | 1 | 4 |
6. | AM607 | Mathematics for Engineers | 3 | 1 | 4 |
7 | PGC-601 | Research Methodology and IPR | 2 | 0 | 2 |
| Total | 20 | 6 | 26 | |
Semester II
Sl. No | Course Code | Course Title | Contact Hours/ |
Credits | |
L | T/P |
| |||
1 | EE610 | Radar Signal Processing | 3 | 1 | 4 |
2 | EE611 | Array Signal Processing | 3 | 1 | 4 |
3 | Departmental Elective I | 3 | 1 | 4 | |
4 | Departmental Elective II | 3 | 1 | 4 | |
5. |
| Elective – III | 3 | 1 | 4 |
6. |
| Elective – IV | 3 | 1 | 4 |
7 | PGC-602 | Audit 1 and 2 | 2 | 0 | 0 |
| Total | 20 | 6 | 24 | |
* Four week industrial practice school during summer vacation for scholarship students (optional).
Semester III
Sl. No | Course Code | Course Title | Contact Hours | *Credits | |
L | T/P | ||||
1 | EE651 | M.Tech. Dissertation Phase I | 28** | 14 | |
|
| Total | 28 | 14 | |
Semester IV
Sl. No | Course Code | Course Title | Contact Hours | *Credits | |
L | T/P | ||||
1 | EE652 | M.Tech. Dissertation Phase II | 28** | 14 | |
|
| Total | 28 | 14 | |
*1 Credit in Theory/Tutorial means 1 contact hour and 1 credit practice/Project Thesis means 2
contact hours in a week.
**Contact Hours/ week
M. Tech. in Electronics and Communication Engineering
(Defence Electronics Systems)
Semester I
Sl. No | Course Code | Course Title | Contact Hours/ |
Credits | |
L | T/P |
| |||
1. | EE601 | Microwave Engineering | 3 | 1 | 4 |
2. | EE602 | Digital Signal Processing | 3 | 1 | 4 |
3. | EE603 | Wireless and Mobile Communication | 3 | 1 | 4 |
4. | EE604 | Radar System Design | 3 | 1 | 4 |
5. | EE624 | Digital System Design using FPGA | 3 | 1 | 4 |
6. | AM607 | Mathematics for Engineers | 3 | 1 | 4 |
7 | PGC-601 | Research Methodology and IPR | 2 | 0 | 2 |
|
| Total | 20 | 6 | 26 |
Semester II
Sl. No | Course Code | Course Title | Contact Hours/ |
Credits | |
L | T/P |
| |||
1 | EE609 | Antenna Systems | 3 | 1 | 4 |
2 | EE614 | EMI/EMC Design | 3 | 1 | 4 |
3 | Departmental Elective I | 3 | 1 | 4 | |
4 |
| Departmental Elective II | 3 | 1 | 4 |
5. | Elective – III | 3 | 1 | 4 | |
6. | Elective – IV | 3 | 1 | 4 | |
7 | PGC-602 | Audit 1 and 2 | 2 | 0 | 0 |
| Total | 20 | 6 | 24 | |
*Four week industrial practice school during summer vacation for scholarship students (optional).
Semester III
Sl. No | Course Code | Course Title | Contact Hours | *Credits | |
L | T/P | ||||
1 | EE651 | M.Tech. Dissertation Phase I | 28** | 14 | |
|
| Total | 28 | 14 | |
Semester IV
Sl. No | Course Code | Course Title | Contact Hours | *Credits | |
L | T/P | ||||
1 | EE652 | M.Tech. Dissertation Phase II | 28** | 14 | |
|
| Total | 28 | 14 | |
*1 Credit in Theory/Tutorial means 1 contact hour and 1 credit practice/Project Thesis means 2 contact hours in a week.
M. Tech. in Electronics and Communication Engineering
(VLSI and Embedded Systems)
Semester I (@DIAT, Pune)
Sl. No | Course Code | Course Title | Contact Hours/ |
Credits | |
L | T/P |
| |||
1. | EE602 | Digital Signal Processing | 3 | 1 | 4 |
2. | EE621 | Digital IC Design | 3 | 1 | 4 |
3. | EE622 | RF IC Design | 3 | 1 | 4 |
4. | EE650 | Semiconductor devices for high speed and high power applications | 3 | 1 | 4 |
5. | EE624 | Digital System Design using FPGA | 3 | 1 | 4 |
6. | AM607 | Mathematics for Engineers | 3 | 1 | 4 |
7 | PGC-601 | Research Methodology and IPR | 2 | 0 | 2 |
| Total | 20 | 6 | 26 | |
Semester II (@DIAT, Pune)
Sl. No | Course Code | Course Title | Contact Hours/ |
Credits | |
L | T/P |
| |||
1. | EE638 | Analog and Mixed mode VLSI Design | 3 | 1 | 4 |
2. | EE648 | VLSI Fabrication Technology | 3 | 1 | 4 |
3. |
| Departmental Elective I | 3 | 1 | 4 |
4. |
| Departmental Elective II | 3 | 1 | 4 |
5. |
| Elective – III | 3 | 1 | 4 |
6. |
| Elective – IV | 3 | 1 | 4 |
7 | PGC-602 | Audit 1 and 2 | 2 | 0 | 0 |
| Total | 20 | 6 | 24 | |
Semester III (@ NIELIT CALICUT)
Sl. No | Course Code | Course Title | Contact Hours | *Credits | |
L | T/P | ||||
1 | EE651 | M.Tech. Dissertation Phase I | 28** | 14 | |
|
| Total | 28 | 14 | |
Semester IV (@ NIELIT CALICUT)
Sl. No | Course Code | Course Title | Contact Hours | *Credits | |
L | T/P | ||||
1 | EE652 | M.Tech. Dissertation Phase II | 28** | 14 | |
|
| Total | 28 | 14 | |
*1 Credit in Theory/Tutorial means 1 contact hour and 1 credit practice/Project Thesis means 2 contact hours in a week.
**Contact Hours/ week
Semester III and Semester IV [Project work and VLSI related Courses @ NIELIT CALICUT].
List of Electives
Sl. No. | Course Code | Course Title | Contact hours/week | Credits | |
L | T/P | ||||
1 | EE605 | Navigation System Concepts | 3 | 1 | 4 |
2 | EE608 | Modern Wireless Communications | 3 | 1 | 1 |
3 | EE612 | High Power Microwave Systems | 3 | 1 | 4 |
4 | EE613 | Electronic Warfare | 3 | 1 | 4 |
5 | EE619 | Software Defined Radio | 3 | 1 | 4 |
6 | EE620 | SoC and Embedded Systems | 3 | 1 | 4 |
7 | EE623 | Semiconductor Devices | 3 | 1 | 4 |
8 | EE625 | High Performance DSP using FPGA | 3 | 1 | 4 |
9 | EE626 | Compressed Sensing & Sparse Signal Processing | 3 | 1 | 4 |
10 | EE627 | Signal Theory, Linear Algebra & Transform Techniques | 3 | 1 | 4 |
11 | EE628 | Advanced Electronics Systems | 3 | 1 | 4 |
12 | EE629 | Sonar Signal Processing | 3 | 1 | 4 |
13 | EE630 | Sonar System Engineering | 3 | 1 | 4 |
14 | EE631 | Satellite Communication | 3 | 1 | 4 |
15 | EE632 | Advanced Communication Systems | 3 | 1 | 4 |
16 | EE633 | Underwater Communications | 3 | 1 | 4 |
17 | EE634 | Monolithic Microwave Integrated Circuit | 3 | 1 | 4 |
18 | EE635 | Inertial Sensors and Systems | 3 | 1 | 4 |
19 | EE636 | Navigation & Avionic Systems | 3 | 1 | 4 |
20 | EE637 | ASIC Verification using System Verilog | 3 | 1 | 4 |
21 | EE638 | Analog and Mixed mode VLSI Design | 3 | 1 | 4 |
22 | EE639 | Computer Aided Design for VLSI Circuits | 3 | 1 | 4 |
23 | EE640 | FPGA Architecture and Applications | 3 | 1 | 4 |
24 | EE641 | VLSI Signal Processing | 3 | 1 | 4 |
25 | EE642 | SoC Design and Verification | 3 | 1 | 4 |
26 | EE643 | Digital Interface Design | 3 | 1 | 4 |
27 | EE644 | MIMO Communications | 3 | 1 | 4 |
28 | EE645 | Advanced Digital Signal Processing | 3 | 1 | 4 |
29 | EE646 | Advanced Simulation Techniques | 3 | 1 | 4 |
30 | EE647 | RF Photonics | 3 | 1 | 4 |
31 | EE648 | VLSI Fabrication Technology | 3 | 1 | 4 |
32 | EE649 | Introduction to Electronics Systems | 3 | 1 | 4 |
33 | EE650 | Semiconductor devices for high speed and high power applications | 3 | 1 | 4 |
34 | EE651 | Quantum Transport in nanoscale FETs | 3 | 1 | 4 |
As per PG Rules, the student is permitted to register for one audit course per semester (till 3rd Semester) which will be certified by the faculty in charge of the course.
In 4th semester, No audit course is allowed.